Cognitive Sub-Nyquist Hardware Prototype of a Collocated MIMO Radar

We present the design and hardware implementation of a radar prototype that demonstrates the principle of a sub-Nyquist collocated multiple-input multiple-output (MIMO) radar. The setup allows sampling in both spatial and spectral domains at rates much lower than dictated by the Nyquist sampling theorem. Our prototype realizes an X-band MIMO radar that can be configured to have a maximum of 8 transmit and 10 receive antenna elements. We use frequency division multiplexing (FDM) to achieve the orthogonality of MIMO waveforms and apply the Xampling framework for signal recovery. The prototype also implements a cognitive transmission scheme where each transmit waveform is restricted to those pre-determined subbands of the full signal bandwidth that the receiver samples and processes. Real-time experiments show reasonable recovery performance while operating as a 4x5 thinned random array wherein the combined spatial and spectral sampling factor reduction is 87.5% of that of a filled 8x10 array.Comment: 5 pages, Compressed Sensing Theory and its Applications to Radar, Sonar and Remote Sensing (CoSeRa) 201

A hardware prototype of wideband high‐dynamic range analog‐to‐digital converter

Abstract Key parameters of analog‐to‐digital converters (ADCs) are their sampling rate and dynamic range. Power consumption and cost of an ADC are directly proportional to the sampling rate; hence, it is desirable to keep it as low as possible. The dynamic range of an ADC also plays an important role, and ideally, it should be greater than the signal's; otherwise, the signal will be clipped. To avoid clipping, modulo folding can be used before sampling, followed by an unfolding algorithm to recover the true signal. Here, the authors present a modulo hardware prototype that can be used before sampling to avoid clipping. The authors’ modulo hardware operates prior to the sampling mechanism and can fold higher frequency signals compared to existing hardware. The authors present a detailed design of the hardware and also address key issues that arise during implementation. In terms of applications, the authors show the reconstruction of finite‐rate‐of‐innovation signals, which are beyond the dynamic range of the ADC. The authors’ system operates at six times below the Nyquist rate of the signal and can accommodate eight times larger signals than the ADC's dynamic range

RF Chain Reduction for MIMO Systems: A Hardware Prototype

Radio frequency (RF) chain circuits play a major role in digital receiver architectures, allowing passband communication signals to be processed in baseband. When operating at high frequencies, these circuits tend to be costly. This increased cost imposes a major limitation on future multiple-input&ndash;multiple-output (MIMO) communication technologies. A common approach to mitigate the increased cost is to utilize hybrid architectures, in which the received signal is combined in analog into a lower dimension, thus reducing the number of RF chains. In this article we study the design and hardware implementation of hybrid architectures via minimizing channel estimation error. We first derive the optimal solution for complex-gain combiners and propose an alternating optimization algorithm for phase-shifter combiners. We then present a hardware prototype implementing analog combining for RF chain reduction. The prototype consists of a specially designed configurable combining board as well as a dedicated experimental setup. Our hardware prototype allows us evaluating the effect of analog combining in MIMO systems using actual communication signals. The experimental study, which focuses on channel estimation accuracy in MIMO channels, demonstrates that using the proposed prototype, the achievable channel estimation performance is within a small gap in a statistical sense from that obtained using a costly receiver in which each antenna is connected to a dedicated RF chain.</p